Product Summary

The 74HC534 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC534 is specified in compliance with JEDEC standard no. 7A. The 74HC534 is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and inverting 3-state outputs for bus oriented applications. A clock (CP) and an output enable (OE) input are common to all flip-flops. The 8 flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the LOW-to-HIGH CP transition. When OE is LOW, the contents of the 8 flip-flops are available at the outputs. When OE is HIGH, the outputs go to the high impedance OFF-state.

Parametrics

74HC534 absolute maximum ratings: (1)tPHL/ tPLH, propagation delay CP to Qn when CL = 15 pF; VCC = 5 V: 12 ns; (2)fmax, maximum clock frequency: 61 MHz; (3)CI, input capacitance: 3.5 pF; (4)CPD, power dissipation capacitance per flip-flop: 19 pF.

Features

74HC534 features: (1)3-state inverting outputs for bus oriented applications; (2)8-bit positive, edge-triggered register; (3)Common 3-state output enable input; (4)Output capability: bus driver; (5)ICC category: MSI.

Diagrams

74HC534 circuit diagram

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74HC534
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74HC/HCT02
74HC/HCT02

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74HC/HCT03
74HC/HCT03

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74HC/HCT10
74HC/HCT10

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74HC/HCT107
74HC/HCT107

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74HC/HCT109
74HC/HCT109

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